Edge AI
JCET provides a full range of advanced packaging and testing solutions, including 2.5D/3D packaging, wafer-level packaging, system-in-package (SiP), etc., and one-stop solutions, including collaborative design/simulation, selection of high-density integration processes, and the use of automated processes to ensure product quality.
In terms of high-density packaging and integration technology, JCET provides a number of industry-leading technologies including high-density mounting SMT capability, laser-assisted bonding (LAB), double-sided molding SiP, electromagnetic interference shielding, etc., which can be used in RF front-end modules (RFFE), millimeter-wave antenna AiP module and other products.
Product & Package Form增长分类
Processor
AP, DSP, FPGA, ASIC, MCU, …
Hybrid BGA
fcCSP
PoP
Wireless Connection
Wearable, WiFi, BLE, NB IoT
LGA
BGA
DSM SiP
RF
PA, RFFE Module, mmWave, AiP
SiP
DSM SiP
AiP
Sensor
Motion, Pressure, Optical MEMS Sensors
Hybrid LF / HFBP
Cavity LF
Exposed Die / Glass
Highlights
SiP, PoP, AiP, and XDFOI; FC, WB, and SMT technologies; Efficient heat solutions and test services
Min device size: 008004; Min device spacing: 45?m; SMT accuracy: ±15?m
High-speed EMI shielding with multiple options; Single-sided, double-sided, and 3D SiP Turnkey wireless test solutions
Solutions for electromagnetic, current, pressure, temperature and humidity, optical, inertial measurement and other sensors
More Applications
